1. Field of the Invention
The present invention generally relates to optical transmitter equipment and, more particularly, to optical transmitter equipment using a semiconductor laser.
2. Discussion of Background
In optical transmitter equipment for optical communication using optical fiber, a semiconductor laser is used as a light source. As one method for optical modulation in the semiconductor laser there widely is adopted a direct modulation method wherein the intensity of laser beam is modulated by increasing or decreasing a current flowing through the semiconductor laser. For the optical transmitter equipment using such a direct modulation type semiconductor laser it is required increase the optical communication speed to meet the demand for a larger capacity. For the speed-up of optical communication it is important to attain the following subjects:                (1) Improvement of a relaxation oscillation frequency in the semiconductor laser        (2) Speed-up of a driver circuit        (3) Decrease of parasitic capacitanceThese subjects are now in the following stages of development, respectively. As to the above subject (1), researches and developments have been made positively in the field of semiconductor laser. As to the above subject (2), a high-speed operation at 10 Gb/s has been attained by microfabrication and structural optimization of an npn bipolar transistor and by the adoption an SiGe material instead of the conventional Si. The above subject (3) is common to all of semiconductor laser, driver circuit, and associated circuits.        
Particularly, for a high-speed operation of 10 Gb/s or more, it is extremely important to achieve not only the above subjects (1) and (2) but also the above subject (3).
In order to clarify problems with parasitic capacitance, reference will now be made to a schematic circuit diagram of FIG. 2 in which a semiconductor laser and a driver circuit are connected together. FIG. 2 shows a typical circuit example in which a differential amplified circuit is connected to a semiconductor laser. In the same figure, the numeral 1 denotes a laser, numerals 2 and 3 denote transistors for the differential amplified circuit, numeral 4 denotes a constant current transistor serving as a load on the transistor 3, numeral 5 denotes a constant current transistor for the differential amplified circuit, numeral 6 denotes a constant current circuit for the application of bias to the semiconductor laser 1, and numeral 7 denotes a resistor. Further, in FIG. 2, the numerals 8 and 9 denote input signal terminals in the differential amplified circuit, to which is connected a preceding circuit usually integral with the circuit in question in the form of an IC.
FIG. 3 shows a relation between a current fed to a semiconductor laser and an optical power of the laser, as well as a relation between a signal current waveform in the use of the semiconductor laser and the waveform of a corresponding optical power of the laser. When the input waveform of FIG. 3 is considered, the semiconductor laser has light-current characteristics such that an optical power of laser is provided at an input current value of above a threshold current value, so the addition of a bias current is required up to a bias point. In the example shown in FIG. 3, the bias current is fed by the constant current circuit 6. More specifically, a current is fed up to a bias point by a constant current transistor (constant current circuit 6) and a rectangular current corresponding to an electrical waveform is further fed by the transistor 2. As a result of the supply of the rectangular current, an optical waveform is outputted from an emission end of the laser. These are the main point of driving the semiconductor laser. It is an example of light-current characteristics of the semiconductor laser at 85° C. that is illustrated in FIG. 3.
In such a circuit configuration, a parasitic capacitance is added mainly in parallel with the semiconductor laser and a transistor and obstructs the speed-up of circuit operation. For example, in the case of a transistor, a parasitic capacitance CCE is present between a collector C and an emitter E equivalently, as shown in FIG. 4.
In FIG. 2, for showing a principle, the transistors 2 and 3 used in the driver circuit of this example are each represented in terms of a single transistor symbol. However, in constituting an actual equipment concretely, the transistor represented by such a single symbol is in form of a parallel connection of plural transistors to increase a maximum output current. An example of this connection is shown in FIG. 5, in which transistors are paralleled in five stages. In the same figure, the numerals 101-105 denote collectors, numerals 201-205 denote bases, and numerals 301-305 denote emitters, of the respective transistors. In this example, five transistors are arranged in parallel and, as a whole, function as a transistor composed of a collector 100, a base 200 and an emitter 300 and capable of carrying a large amount of current. Particularly, for allowing the semiconductor transistor to operate at 10 Gb/s or more, a large current of about 50 mA in amplitude is needed and therefore it is essential that the transistors 2 and 3 be paralleled as in FIG. 5. Thus, since a large number of individual transistors are used, a parasitic capacitance for the circuit concerned also becomes large as a whole.
Further, in FIG. 2, also as to the transistor 6 for a bias current to be fed to the semiconductor laser 1, there usually is adopted a parallel configuration, in which the number of parallel stages is about the same as in the case of the transistors 2 and 3. Consequently, a parasitic capacitance for this transistor circuit is also large.
Now there will be shown a concrete example in which the number of parallel stages and parasitic capacitance of the bias transistor 6 become large. The bias current which the bias transistor 6 supplies is, for example, 25 mA or so, which is half of that supplied by the transistors 2 and 3. However, the bias current is a constant current, while the transistors 2 and 3 in the differential amplified circuit operate at a high speed under the conditions of rectangle wave, amplitude 50 mA, and minimum current 0 mA, with an averaging value being 25 mA. Usually, therefore, the number of parallel stages in the transistors 2, 3 and that in the bias transistor 6 are almost the same.
The number of parallel stages and maximum output current in a transistor depend on a calorific value of the transistor. A resistor 7 is connected in series with the bias transistor 6. If its resistance value is set very large, the parasitic capacitance of the transistor 6 ought to become less influential. However, with such a low source voltage as −5.2V, the resistance value of the resistor 7 cannot be made large. Thus, it is the actual situation that the attainment of a high speed is obstructed by the parasitic capacitance of the transistor 6.